1. Field of the Invention
The present invention relates to a color burst automatic detection device for determining whether a form of a video signal inputted to a video signal receiving apparatus such as a TV set is a composite signal containing a color burst signal, a color signal and a synchronization signal each superimposed on a luminance signal or a component signal containing only a synchronization signal superimposed on a luminance signal.
2. Description of the Related Art
JP01-252090A discloses a signal detection circuit as one example of a well-known color burst automatic detection device for determining presence/absence of a color burst signal superimposed on a video signal.
This well-known signal detection circuit includes an ID synchronization detection circuit for receiving a color signal, a reference signal of a color carrier, and a burst gate pulse indicating a color burst signal period, and performing ID synchronization detection between a color burst signal contained in the color signal and the reference signal in accordance with the burst gate pulse, and a smoothing capacitor for smoothing an ID synchronization detection output from the ID synchronization detection circuit.
The well-known signal detection circuit also includes a circuit for generating a negative burst ID pulse in a period in which the ID synchronization detection output smoothed by the smoothing capacitor is smaller than a reference voltage V2, that is, when a synchronization state between the color burst signal contained in the color signal and the reference signal is not normal, and generating a positive burst ID pulse in a period in which the smoothed ID synchronization detection output is larger than a reference voltage V1, that is, when the synchronization state between the color burst signal contained in the color signal and the reference signal is normal.
The well-known signal detection circuit also includes a first counter reset by a reference pulse with a predetermined frequency (e.g., 60 Hz) or the negative burst ID pulse to count the positive burst ID pulse, and outputting a pulse when a count value reaches a predetermined value, a second counter reset by the reference pulse to count the pulse outputted from the first counter, and a hold circuit for holding a count output of the second counter by the reference pulse immediately before reset of the second counter, determining that a color signal (a color burst signal) is present when the held value is not less than a predetermined value, determining that a color signal (a color burst signal) is absent when the held value is less than the predetermined value, and outputting a determination output signal.
With the aforementioned configuration, the well-known signal detection circuit generates a positive burst ID pulse and a negative burst ID pulse, allows the first counter and the second counter to count the continuity and the number of pulses, allows the hold circuit to hold count values, and determines the count values. Thus, the well-known signal detection circuit determines presence/absence of a color burst signal.
According to this method, it is possible to determine whether a form of a video signal to be inputted is a composite signal or a component signal.
However, the well-known signal detection circuit has the following problems.
In the well-known signal detection circuit, first, the ID synchronization detection circuit performs ID synchronization detection between a color burst signal contained in a color signal and a reference signal in a burst gate pulse period. Therefore, a voltage to be charged to the smoothing capacitor largely varies due to a phase difference of the reference signal relative to the color burst signal contained in the color signal. In addition, it is impossible to determine whether a video signal to be inputted is a composite signal or a component signal in one horizontal blanking period. Consequently, it is necessary to count a detection pulse over plural horizontal blanking periods.
Further, the well-known signal detection circuit requires the first counter, the second counter and the hold circuit in addition to the ID synchronization detection circuit, resulting in large circuit scale.
In the well-known signal detection circuit, moreover, a reference signal to be inputted to the ID synchronization detection circuit is a fixed signal. Therefore, if a reference signal has a frequency of, for example, 3.58 MHz, a NTSC video signal must be inputted. On the other hand, if a reference signal has a frequency of, for example, 4.43 MHz, a PAL video signal must be inputted. Thus, the well-known signal detection circuit cannot be respond to a case of reception of multi-broadcasting. If the ID synchronization detection circuit is made to correspond to both a reference signal with a frequency of 3.58 MHz and a reference signal with a frequency of 4.43 MHz, a circuit scale thereof is further increased.
In addition, a timing at which a color burst signal is superimposed is replaced, in many cases, with a DC voltage near a pedestal level after color demodulation is performed using a composite signal. Such timing has a DC offset relative to the pedestal level. Consequently, if the well-known signal detection circuit receives a luminance signal having a DC offset in a color burst period, it is determined as if a color burst signal is constantly present by the detection of a DC offset portion and a reference signal.